[31m 1:  292ba15c1201 [m[33m![m[32m  1:  dc6f0e294ec0[m[33m dt-bindings: net: wireless: Add QCN6432 device tree binding documentation[m
    [7m[36m@@[m [mMetadata[m
     Author: Aaradhana Sahu <aaradhana.sahu@oss.qualcomm.com>[m
     [m
      ## Commit message ##[m
    [7m[31m-[m[2m    dt-bindings: net: wireless: Add QCN6432 device tree binding documentation[m
    [7m[32m+[m[1m    dt-bindings: net: wireless: Add QCN6432[m
     [m
         Add Devicetree binding documentation for the Qualcomm QCN6432 IEEE 802.11be[m
         wireless device.[m
    [7m[36m@@[m [mCommit message[m
     [m
         Signed-off-by: Aaradhana Sahu <aaradhana.sahu@oss.qualcomm.com>[m
     [m
    [7m[31m-[m[2m ## Documentation/devicetree/bindings/net/wireless/qcom,qcn6432-wifi.yaml (new) ##[m
    [7m[32m+[m[1m ## Documentation/devicetree/bindings/net/wireless/qcom,qcn6432.yaml (new) ##[m
    [36m @@[m
    [32m +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)[m
    [32m +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.[m
    [32m +%YAML 1.2[m
    [32m +---[m
    [7m[31m-[m[2;32m+$id: http://devicetree.org/schemas/net/wireless/qcom,qcn6432-wifi.yaml#[m
    [7m[32m+[m[1;32m+$id: http://devicetree.org/schemas/net/wireless/qcom,qcn6432.yaml#[m
    [32m +$schema: http://devicetree.org/meta-schemas/core.yaml#[m
    [32m +[m
    [32m +title: Qualcomm Technologies QCN6432 wireless device[m
[33m 2:  027dc832aeff =  2:  45913d20ca50 wifi: ath12k: Refactor PCI operations and MSI config structure[m
[31m 3:  7121a656fd1a [m[33m![m[32m  3:  e55d9a8506aa[m[33m wifi: ath12k: Add hardware parameter for QCN6432[m
    [7m[36m@@[m [mdrivers/net/wireless/ath/ath12k/wifi7/hw.c: static const struct ath12k_hw_params[m
    [32m +		.max_radios = 1,[m
    [32m +		.single_pdev_only = false,[m
    [32m +		.qmi_service_ins_id = ATH12K_QMI_WLFW_SERVICE_INS_ID_V01_QCN6432,[m
    [7m[32m+[m[1;32m+		.qmi_max_chunk_size = SZ_2M,[m
    [32m +		.internal_sleep_clock = false,[m
    [32m +[m
    [32m +		.hw_ops = &qcn9274_ops,[m
[33m 4:  4afc11988edc =  4:  b538cdd71b9d wifi: ath12k: Add hardware ring mask for QCN6432[m
[33m 5:  748ef4e66200 =  5:  0a188cf0e2d7 wifi: ath12k: add hardware registers for QCN6432[m
[33m 6:  56a15226cade =  6:  7f5c467c299c wifi: ath12k: move multi MSI vector flag to ath12k_dev_flags[m
[33m 7:  56d003f7d2e8 =  7:  c698b31ba79f wifi: ath12k: Add hybrid_bus_type in ath12k_hw_params[m
[33m 8:  892611905103 =  8:  e856cce78c4f wifi: ath12k: Add hif operation support for QCN6432[m
[33m 9:  fdc6055af94d =  9:  2ace5ecc4977 wifi: ath12k: add support for unified data-region memory allocation[m
[33m10:  f3497b0b467a = 10:  7308863eafe3 wifi: ath12k: move MSI config to pci.c[m
[33m11:  37cdbacdb447 = 11:  af8165b5e20d wifi: ath12k: Add platform MSI support for CE[m
[33m12:  37eecb1166a3 = 12:  fe7550b7076e wifi: ath12k: Enable MSI interrupt support for DP interrupt[m
[33m13:  1a7f6baff665 = 13:  0031af9554f8 wifi: ath12k: use CMEM write for PPT on hybrid bus devices[m
[33m14:  6b2820c5dd18 = 14:  8f43ec039577 wifi: ath12k: store and use MSI data per CE and DP interrupt group for QCN6432[m
[33m15:  9af6c5bc1eae = 15:  28ecd200ec83 wifi: ath12k: Derive QMI service instance ID per protection domain[m
[33m16:  2f2c3822a1a9 = 16:  dbf72c83e2f2 wifi: ath12k: Resolve userPD ID per device[m
[33m17:  5b7a98dcce11 = 17:  64f7d101d7b6 wifi: ath12k: Add QCN6432 AHB support[m